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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 1-, 2-a step down converter with forced pwm feature in sot563 package 1 1 features 1 ? forced pwm to reduce output voltage ripple ? up to 95% efficiency ? low r ds(on) switches 100 m / 60 m ? 2.5-v to 5.5-v input voltage range ? adjustable output voltage from 0.6 v to v in ? 100% duty cycle for lowest dropout ? 1.5-mhz typical switching frequency ? power good output ? over current protection ? internal soft startup ? thermal shutdown protection ? available in sot563 package ? pin-to-pin compatible with tlv62568 , tlv62569 ? create a custom design with the webench ? power designer 2 applications ? general purpose pol supply ? set top box ? network video camera ? wireless router ? solid state driver / hard disk driver 3 description the tlv62568a, TLV62569A devices are synchronous step-down buck dc-dc converters optimized for high efficiency and compact solution size. the device integrates switches capable of delivering an output current up to 2 a. at the whole load range, the device operates in pulse width modulation (pwm) mode with 1.5-mhz switching frequency. in shutdown, the current consumption is reduced to less than 2 a. an internal soft start circuit limits the inrush current during startup. other features like over current protection, thermal shutdown protection and power good are built-in. the device is available in a sot563 package. device information (1) part number package body size (nom) tlv62568adrl sot563 (6) 1.60 mm x 1.60 mm tlv62568apdrl TLV62569Adrl TLV62569Apdrl (1) for all available packages, see the orderable addendum at the end of the datasheet. device comparison part number output current function tlv62568adrl 1 a - tlv62568apdrl power good TLV62569Adrl 2 a - TLV62569Apdrl power good sp sp sp typical application schematic sp sp efficiency at 5-v input voltage r1 200 k r2 100 k sw gnd fb en vin c3* c2 22 f c1 4.7 f v in 2.5 v to 5.5 v v out 1.8 v / 2.0 a l1 1.0 h c3: optional TLV62569A copyright 2016, texas instruments incorporated load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d008 v out = 1.2 v v out = 1.8 v v out = 2.5 v v out = 3.3 v tools & software technical documents ordernow productfolder support &community
2 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 3 6.1 absolute maximum ratings ...................................... 3 6.2 esd ratings .............................................................. 3 6.3 recommended operating conditions ....................... 4 6.4 thermal information .................................................. 4 6.5 electrical characteristics ........................................... 4 6.6 typical characteristics .............................................. 5 7 detailed description .............................................. 6 7.1 overview ................................................................... 6 7.2 functional block diagrams ....................................... 6 7.3 feature description ................................................... 6 7.4 device functional modes .......................................... 7 8 application and implementation .......................... 8 8.1 application information .............................................. 8 8.2 typical application .................................................... 8 9 power supply recommendations ...................... 13 10 layout ................................................................... 13 10.1 layout guidelines ................................................. 13 10.2 layout example .................................................... 13 10.3 thermal considerations ........................................ 14 11 device and documentation support ................. 14 11.1 device support .................................................... 14 11.2 documentation support ....................................... 14 11.3 receiving notification of documentation updates 14 11.4 community resources .......................................... 15 11.5 trademarks ........................................................... 15 11.6 electrostatic discharge caution ............................ 15 11.7 glossary ................................................................ 15 12 mechanical, packaging, and orderable information ........................................................... 15 4 revision history changes from original (april 2018) to revision a page ? changed status from advance information to production data ............................................................................................ 1
3 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 5 pin configuration and functions pin functions name sot563-6 i/o/pwr description pin number fb 1 i feedback pin for the internal control loop. connect this pin to an external feedback divider. gnd 2 pwr ground pin. vin 3 pwr power supply voltage input. sw 4 pwr switch pin connected to the internal fet switches and inductor terminal. connect the inductor of the output filter to this pin. en 5 i device enable logic input. logic high enables the device, logic low disables the device and turns it into shutdown. do not leave floating. pg 6 o power good open drain output pin for TLV62569Apdrl. the pull-up resistor should not be connected to any voltage higher than 5.5v. if it's not used, leave the pin floating. nc 6 - no connection pin for TLV62569Adrl. the pin can be connected to the output or the ground for enhancing thermal performance. or leave it floating. (1) stresses beyond those listed under absolute maximum rating may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating condition . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values are with respect to network ground terminal. (3) while switching. 6 specifications 6.1 absolute maximum ratings over operating temperature range (unless otherwise noted) (1) min max unit voltage (2) vin, en, pg -0.3 6 v sw (dc) -0.3 v in + 0.3 sw (ac, less than 10ns) (3) -3.0 9 fb -0.3 3 t j junction temperature -40 150 c t stg storage temperature -65 150 c (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human body model (hbm), per ansi/esda/jedec js-001, all pins (1) 2000 v charged device model (cdm), per jedec specification jesd22-c101, all pins (2) 500 nc/pg 1 2 3 6 5 4 en sw gnd vin fb sot563-6 drl package (top view)
4 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit v in input voltage 2.5 5.5 v v out output voltage 0.6 v in v i out output current 0 2 a t j junction temperature -40 125 c (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. (2) not applicable to an evm. 6.4 thermal information thermal metric (1) tlv62568ax, TLV62569Ax unit jedec (drl) evm (drl) 6 pins 6 pins r ja junction-to-ambient thermal resistance 142.8 124.8 c/w r jc(top) junction-to-case (top) thermal resistance 51.1 n/a (2) c/w r jb junction-to-board thermal resistance 28.9 n/a (2) c/w jt junction-to-top characterization parameter 1.4 1.6 c/w jb junction-to-board characterization parameter 28.7 23.1 c/w 6.5 electrical characteristics v in = 5.0 v, t j = 25 c, unless otherwise noted parameter test conditions min typ max unit supply i sd shutdown current into vin pin en = 0 v 0.01 2 a v uvlo under voltage lock out v in falling 2.3 2.45 v under voltage lock out hysteresis 100 mv t jsd thermal shutdown t j rising 150 c t j falling 130 logic interface v ih high-level input voltage at en pin 2.5 v in 5.5 1.2 v v il low-level input voltage at en pin 2.5 v in 5.5 0.4 v t ss soft startup time from en high to 95% of vout nominal 0.9 ms v pg power good threshold v fb rising, referenced to v fb nominal 95% v fb falling, referenced to v fb nominal 90% v pg,ol low-level output voltage at pg pin i sink = 1 ma 0.4 v i pg,lkg input leakage current into pg pin v pg = 5 v 100 na t pg,dly power good delay time v fb falling 40 s
5 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated electrical characteristics (continued) v in = 5.0 v, t j = 25 c, unless otherwise noted parameter test conditions min typ max unit output v fb feedback regulation voltage 0.588 0.6 0.612 v r ds(on) high-side fet on resistance 100 m low-side fet on resistance 60 i lim high-side fet current limit TLV62569A, TLV62569Ap 3 a tlv62568a, tlv62568ap 2 f sw switching frequency 1.5 mhz 6.6 typical characteristics figure 1. shutdown current vs junction temperature figure 2. fb voltage accuracy figure 3. switch current limit, TLV62569A figure 4. switch current limit, tlv62568a junction temperature (c) 6kxwgrzq&xuuhqw $ -40 -20 0 20 40 60 80 100 120 0.0 0.1 0.2 0.3 0.4 0.5 d002 v in = 2.5v v in = 3.6v v in = 5.0v input voltage (v) fb voltage (v) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.594 0.597 0.600 0.603 0.606 d003 t j = -40c t j = 25c t j = 85c t j = 125c junction temperature (c) switch current limit (a) -40 -20 0 20 40 60 80 100 120 1.5 2.0 2.5 3.0 d021 v in = 2.7v v in = 3.6v v in = 5.0v junction temperature (c) switch current limit (a) -40 -20 0 20 40 60 80 100 120 2.5 3.0 3.5 4.0 d020 v in = 2.7v v in = 3.6v v in = 5.0v
6 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 7 detailed description 7.1 overview the device is a high-efficiency synchronous step-down converter. the device operates with an adaptive off time with peak current control scheme. the device operates at typically 1.5-mhz frequency pulse width modulation (pwm) . based on the v in /v out ratio, a simple circuit sets the required off time for the low-side mosfet. it makes the switching frequency relatively constant regardless of the variation of input voltage, output voltage, and load current. 7.2 functional block diagrams figure 5. TLV62569A functional block diagram 7.3 feature description 7.3.1 100% duty cycle low dropout operation the device offers a low input-to-output voltage differential by entering 100% duty cycle mode. in this mode, the high-side mosfet switch is constantly turned on and the low-side mosfet is switched off. the minimum input voltage to maintain output regulation, depending on the load current and output voltage, is calculated as: v in(min) = v out + i out x (r ds(on) + r l ) where ? r ds(on) = high side fet on-resistance ? r l = inductor ohmic resistance (dcr) (1) 7.3.2 soft startup after enabling the device, internal soft startup circuitry ramps up the output voltage which reaches nominal output voltage during a startup time. this avoids excessive inrush current and creates a smooth output voltage rise slope. it also prevents excessive voltage drops of primary cells and rechargeable batteries with high internal impedance. control logic soft start thermal shutdown uvlo gate drive gnd fb en sw modulator t off gnd peak current detect +_ v ref v sw v in + gnd v pg v fb vin pg copyright 2018, texas instruments incorporated
7 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated feature description (continued) the device is able to start into a pre-biased output capacitor. the converter starts with the applied bias voltage and ramps the output voltage to its nominal value. 7.3.3 switch current limit the switch current limit prevents the device from high inductor current and drawing excessive current from a battery or input voltage rail. excessive current might occur with a heavy load or shorted output circuit condition. the device adopts the peak current control by sensing the current of the high-side switch. once the high-side switch current limit is reached, the high-side switch is turned off and low-side switch is turned on to ramp down the inductor current with an adaptive off-time. 7.3.4 under voltage lockout to avoid mis-operation of the device at low input voltages, under voltage lockout is implemented that shuts down the device at voltages lower than v uvlo with v hys_uvlo hysteresis. 7.3.5 thermal shutdown the device enters thermal shutdown once the junction temperature exceeds the thermal shutdown rising threshold, t jsd . once the junction temperature falls below the falling threshold, the device returns to normal operation automatically. 7.4 device functional modes 7.4.1 enabling/disabling the device the device is enabled by setting the en input to a logic high. accordingly, a logic low disables the device. if the device is enabled, the internal power stage starts switching and regulates the output voltage to the set point voltage. the en input must be terminated and should not be left floating. 7.4.2 power good the tlv62568ap and TLV62569Ap have a power good output. the pg pin goes high impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. the pg pin is an open-drain output and is specified to sink up to 1 ma. the power good output requires a pull-up resistor connecting to any voltage rail less than 5.5 v. the pg signal can be used for sequencing of multiple rails by connecting it to the en pin of other converters. leave the pg pin unconnected when not used. table 1. pg pin logic device conditions logic status high z low enable en = high, v fb v pg en = high, v fb v pg shutdown en = low thermal shutdown t j > t jsd uvlo 1.4 v < v in < v uvlo power supply removal v in 1.4 v
8 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information the following section discusses the design of the external components to complete the power supply design for several input and output voltage options by using typical applications as a reference. 8.2 typical application figure 6. TLV62569A 1.8-v output application 8.2.1 design requirements for this design example, use the parameters listed in table 2 as the input parameters. table 2. design parameters design parameter example value input voltage 2.5 v to 5.5 v output voltage 1.8 v maximum output current 2.0 a (1) see third-party products disclaimer table 3 lists the components used for the example. table 3. list of components reference description manufacturer (1) c1 4.7 f, ceramic capacitor, 10 v, x7r, size 0805, grm21br71a475ka73l murata c2 22 f, ceramic capacitor, 6.3 v, x7t, size 0805, grm21bd70j226me44 murata l1 1.0 h, power inductor, size 4mmx4mm, xal4020-102me coilcraft r1,r2,r3 chip resistor,1%,size 0603 std. c3 optional, 10 pf if it is needed std. 8.2.2 detailed design procedure 8.2.2.1 custom design with webench ? tools click here to create a custom design using the TLV62569A device with the webench ? power designer. r1 200 k r2 100 k sw gnd fb en vin c3* c2 22 f c1 4.7 f v in 2.5 v to 5.5 v v out 1.8 v / 2.0 a l1 1.0 h c3: optional TLV62569A copyright 2016, texas instruments incorporated
9 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated (1) inductor tolerance and current de-rating is anticipated. the effective inductance can vary by +20% and -30%. (2) capacitance tolerance and bias voltage de-rating is anticipated. the effective capacitance can vary by +20% and -50%. (3) this lc combination is the standard value and recommended for most applications. 1. start by entering the input voltage (v in ), output voltage (v out ), and output current (i out ) requirements. 2. optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. compare the generated design with other possible solutions from texas instruments. the webench power designer provides a customized schematic along with a list of materials with real-time pricing and component availability. in most cases, these actions are available: ? run electrical simulations to see important waveforms and circuit performance ? run thermal simulations to understand board thermal performance ? export customized schematic and layout into popular cad formats ? print pdf reports for the design, and share the design with colleagues get more information about webench tools at www.ti.com/webench . 8.2.2.2 setting the output voltage an external resistor divider is used to set output voltage according to equation 2 . when sizing r2, in order to achieve low current consumption and acceptable noise sensitivity, use a maximum of 200 k for r2. larger currents through r2 improve noise sensitivity and output voltage accuracy but increase current consumption. (2) a feed forward capacitor, c3 improves the loop bandwidth to make a fast transient response (shown in figure 24 ). a 10-pf capacitance is recommended for r2 of 100-k resistance. a more detailed discussion on the optimization for stability vs. transient response can be found in slva289 . 8.2.2.3 output filter design the inductor and output capacitor together provide a low-pass filter. to simplify this process, table 4 outlines possible inductor and capacitor value combinations. checked cells represent combinations that are proven for stability by simulation and lab test. further combinations should be checked for each individual application. table 4. matrix of output capacitor and inductor combinations v out [v] l [ h] (1) c out [ f] (2) 4.7 10 22 47 100 0.6 v out < 1.2 1 + 1.2 v out 1 ++ (3) + 8.2.2.4 inductor selection the main parameters for inductor selection is inductor value and then saturation current of the inductor. to calculate the maximum inductor current under static load conditions, equation 3 is given: where: ? i out,max is the maximum output current ? i l is the inductor current ripple ? ? ? ? + = ? ? ? ? + = 2 1 1 6.0 2 1 1 r r v r r v v fb out sw in out out l l max , out max ,l f l v v 1 v i 2 i i i - = d d + =
10 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated ? f sw is the switching frequency ? l is the inductor value (3) it is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than i l,max . in addition, dc resistance and size should also be taken into account when selecting an appropriate inductor. 8.2.2.5 input and output capacitor selection the architecture of the device allows use of tiny ceramic-type output capacitors with low equivalent series resistance (esr). these capacitors provide low output voltage ripple and are thus recommended. to keep its resistance up to high frequencies and to achieve narrow capacitance variation with temperature, it is recommended to use x7t or x5r dielectric. the input capacitor is the low impedance energy source for the converter that helps provide stable operation. a low esr multilayer ceramic capacitor is recommended for best filtering. for most applications, 4.7- f input capacitance is sufficient; a larger value reduces input voltage ripple. the device is designed to operate with an output capacitor of 22 f to 47 f, as outlined in table 4 . 8.2.3 application performance curves v in = 5 v, v out = 1.8 v, t a = 25 c, external components shown in table 3 , unless otherwise noted. v out = 0.6 v figure 7. quiescent current figure 8. 0.6-v output efficiency figure 9. 1.2-v output efficiency figure 10. 1.8-v output efficiency load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d006 v in = 3.3 v v in = 4.2 v v in = 5.0 v load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 55 60 65 70 75 80 85 90 95 d005 v in = 3.3 v v in = 4.2 v v in = 5.0 v input voltage (v) quiescent current (ma) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0 2 4 6 8 10 d001 t j = -40c t j = 25c t j = 85c t j = 125c load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d004 v in = 3.3 v v in = 4.2 v v in = 5.0 v
11 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated figure 11. 2.5-v output efficiency figure 12. 3.3-v output efficiency figure 13. 5.0-v input efficiency v in = 5 v figure 14. load regulation i out = 1 a figure 15. line regulation pg is high figure 16. maximum output current at v out = 1.8 v load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d008 v out = 1.2 v v out = 1.8 v v out = 2.5 v v out = 3.3 v load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d019 v in = 3.3 v v in = 4.2 v v in = 5.0 v input voltage (v) line regulation (%) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 -1.00 -0.50 0.00 0.50 1.00 d010 v out = 0.6 v v out = 1.2 v v out = 1.8 v v out = 3.3 v load (a) load regulation (%) 0.0 0.5 1.0 1.5 2.0 -1.00 -0.50 0.00 0.50 1.00 d009 v out = 0.6 v v out = 1.2 v v out = 1.8 v v out = 3.3 v input voltage (v) maximum output current (a) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 d019 t a = 25c t a = 65c t a = 85c load (a) efficiency (%) 0.0 0.5 1.0 1.5 2.0 60 65 70 75 80 85 90 95 100 d007 v in = 4.2 v v in = 5.0 v
12 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated v in = 5 v figure 17. switching frequency vs load i out = 1 a figure 18. switching frequency vs input voltage i out = 36 ma figure 19. pwm operation i out = 1 a figure 20. pwm operation load = 0.9 figure 21. startup and shutdown with load load = 9 figure 22. startup and shutdown with load time - 500ns/div d014 v sw 5v/div v out 10mv/div ac i coil 0.5a/div time - 500ns/div d013 v sw 5v/div v out 10mv/div ac i coil 0.5a/div load (a) switching frequency (khz) 0 0.5 1 1.5 2 0 500 1000 1500 2000 d011 v out = 0.6 v v out = 1.2 v v out = 1.8 v v out = 2.5 v v out = 3.3 v input voltage (v) switching frequency (khz) 2.5 3 3.5 4 4.5 5 5.5 0 500 1000 1500 2000 d012 v out = 0.6 v v out = 1.2 v v out = 1.8 v v out = 2.5 v v out = 3.3 v 7lph v',9 d015 v en 2v/div v out 0.5v/div i coil 1a/div 7lph v',9 d016 v en 2v/div v out 0.5v/div i coil 0.5a/div
13 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated load step 0 a to 1 a, 1a/ s slew rate figure 23. load transient load step 0 a to 1 a, 1a/ s slew rate c3 = 10 pf figure 24. load transient with a feed forward capacitor 9 power supply recommendations the power supply to the TLV62569A must have a current rating according to the supply voltage, output voltage and output current. 10 layout 10.1 layout guidelines the pcb layout is an important step to maintain the high performance of the TLV62569A device. ? the input/output capacitors and the inductor should be placed as close as possible to the ic. this keeps the power traces short. routing these power traces direct and wide results in low trace resistance and low parasitic inductance. ? the low side of the input and output capacitors must be connected properly to the power gnd to avoid a gnd potential shift. ? the sense traces connected to fb are signal traces. special care should be taken to avoid noise being induced. keep these traces away from sw nodes. ? gnd layers might be used for shielding. 10.2 layout example figure 25. TLV62569Apdrl layout l1 r1 r2 c1 c2 vin vout gnd sw en pg fb vin gnd vin 7lph v',9 d017 v out 0.1v/div ac i coil 0.5a/div 7lph v',9 d018 v out 0.1v/div ac i coil 0.5a/div
14 tlv62568a , TLV62569A slvse95a ? april 2018 ? revised may 2018 www.ti.com product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 10.3 thermal considerations implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. many system-dependent issues such as thermal coupling, airflow, convection surfaces, and the presence of other heat-generating components affect the power dissipation limits of a given component. two basic approaches for enhancing thermal performance are listed below: ? improving the power dissipation capability of the pcb design ? introducing airflow in the system for more details on how to use the thermal parameters, see the application notes: thermal characteristics application notes szza017 and spra953 . 11 device and documentation support 11.1 device support 11.1.1 third-party products disclaimer ti's publication of information regarding third-party products or services does not constitute an endorsement regarding the suitability of such products or services or a warranty, representation or endorsement of such products or services, either alone or in combination with any ti product or service. 11.1.2 development support 11.1.2.1 custom design with webench ? tools click here to create a custom design using the TLV62569A device with the webench ? power designer. 1. start by entering the input voltage (v in ), output voltage (v out ), and output current (i out ) requirements. 2. optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. compare the generated design with other possible solutions from texas instruments. the webench power designer provides a customized schematic along with a list of materials with real-time pricing and component availability. in most cases, these actions are available: ? run electrical simulations to see important waveforms and circuit performance ? run thermal simulations to understand board thermal performance ? export customized schematic and layout into popular cad formats ? print pdf reports for the design, and share the design with colleagues get more information about webench tools at www.ti.com/webench . 11.2 documentation support 11.2.1 related documentation semiconductor and ic package thermal metrics application report ( spra953 ) thermal characteristics of linear and logic packages using jedec pcb designs application report ( szza017 ) 11.3 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com. in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document.
15 tlv62568a , TLV62569A www.ti.com slvse95a ? april 2018 ? revised may 2018 product folder links: tlv62568a TLV62569A submit documentation feedback copyright ? 2018, texas instruments incorporated 11.4 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.5 trademarks e2e is a trademark of texas instruments. webench is a registered trademark of texas instruments. 11.6 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 11.7 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 23-may-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tlv62568adrlr active sot-5x3 drl 6 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1be tlv62568adrlt active sot-5x3 drl 6 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1be tlv62568apdrlr active sot-5x3 drl 6 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bf tlv62568apdrlt active sot-5x3 drl 6 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bf TLV62569Adrlr active sot-5x3 drl 6 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bg TLV62569Adrlt active sot-5x3 drl 6 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bg TLV62569Apdrlr active sot-5x3 drl 6 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bh TLV62569Apdrlt active sot-5x3 drl 6 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 1bh xlv62568apdrlt active sot-5x3 drl 6 250 tbd call ti call ti -40 to 125 xlv62569apdrlt active sot-5x3 drl 6 250 tbd call ti call ti -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature.
package option addendum www.ti.com 23-may-2018 addendum-page 2 (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tlv62568adrlr sot-5x3 drl 6 3000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 tlv62568adrlt sot-5x3 drl 6 250 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 tlv62568apdrlr sot-5x3 drl 6 3000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 tlv62568apdrlt sot-5x3 drl 6 250 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 TLV62569Adrlr sot-5x3 drl 6 3000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 TLV62569Adrlt sot-5x3 drl 6 250 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 TLV62569Apdrlr sot-5x3 drl 6 3000 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 TLV62569Apdrlt sot-5x3 drl 6 250 180.0 9.5 1.78 1.78 0.69 4.0 8.0 q3 package materials information www.ti.com 24-may-2018 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) tlv62568adrlr sot-5x3 drl 6 3000 184.0 184.0 19.0 tlv62568adrlt sot-5x3 drl 6 250 184.0 184.0 19.0 tlv62568apdrlr sot-5x3 drl 6 3000 184.0 184.0 19.0 tlv62568apdrlt sot-5x3 drl 6 250 184.0 184.0 19.0 TLV62569Adrlr sot-5x3 drl 6 3000 184.0 184.0 19.0 TLV62569Adrlt sot-5x3 drl 6 250 184.0 184.0 19.0 TLV62569Apdrlr sot-5x3 drl 6 3000 184.0 184.0 19.0 TLV62569Apdrlt sot-5x3 drl 6 250 184.0 184.0 19.0 package materials information www.ti.com 24-may-2018 pack materials-page 2

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